SCES681E January   2008  – April 2024 SN74AUP2G08

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Resistance Characteristics
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics - CL = 5 pF
    7. 5.7  Switching Characteristics - CL = 10 pF
    8. 5.8  Switching Characteristics - CL = 15 pF
    9. 5.9  Switching Characteristics - CL = 30 pF
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 19
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Partial Power Down (Ioff)
      4. 7.3.4 Standard CMOS Inputs
      5. 7.3.5 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
VCCSupply voltage0.83.6V
VIHHigh-level input voltageVCC = 0.8VVCCV
VCC = 1.1V to 1.95V0.65 × VCC
VCC = 2.3V to 2.7V1.6
VCC = 3V to 3.6V2
VILLow-level input voltageVCC = 0.8V0V
VCC = 1.1V to 1.95V0.35 × VCC
VCC = 2.3V to 2.7V0.7
VCC = 3V to 3.6V0.9
VIInput voltage03.6V
VOOutput voltage0VCCV
IOHHigh-level output currentVCC = 0.8V–20μA
VCC = 1.1V–1.1mA
VCC = 1.4V–1.7
VCC = 1.65V–1.9
VCC = 2.3V–3.1
VCC = 3V–4
IOLLow-level output currentVCC = 0.8V20μA
VCC = 1.1V1.1mA
VCC = 1.4V1.7
VCC = 1.65V1.9
VCC = 2.3V3.1
VCC = 3V4
Δt/ΔvInput transition rise or fall rateVCC = 0.8V to 3.6V200ns/V
TAOperating free-air temperature–40

125

°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating CMOS Inputs