SCES530J December   2003  – August 2024 SN74AVC1T45

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Thermal Information
    4. 5.4  Electrical Characteristics
    5. 5.5  Switching Characteristics, VCCA = 1.2 ± 0.12 V
    6. 5.6  Switching Characteristics, VCCA = 1.5 ± 0.1 V
    7. 5.7  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    8. 5.8  Switching Characteristics, VCCA = 2.5 ± 0.2 V
    9. 5.9  Switching Characteristics, VCCA = 3.3 ± 0.3 V
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable
      2. 7.3.2 Support High-Speed Translation
      3. 7.3.3 Ioff Supports Partial-Power-Down Mode Operation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Enable Times
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Considerations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|6
  • DRL|6
  • YZP|6
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Thermal Information

THERMAL METRIC (1) SN74AVC1T45-Q1 UNIT
DCK (TSC70) DRY (USON)
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 239.9 291.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 175.0 137.6 °C/W
RθJB Junction-to-board thermal resistance 94.4 176.5 °C/W
YJT Junction-to-top characterization parameter 75.6 47.3 °C/W
YJB Junction-to-board characterization parameter 93.9 175.9 °C/W
RθJC(bottom) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.