SCES531M December   2003  – October 2024 SN74AVC2T45

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.2 V
    7. 5.7  Switching Characteristics: VCCA = 1.5 V ±0.1 V
    8. 5.8  Switching Characteristics: VCCA = 1.8 V ±0.15 V
    9. 5.9  Switching Characteristics: VCCA = 2.5 V ±0.2 V
    10. 5.10 Switching Characteristics: VCCA = 3.3 V ±0.3 V
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 1.2 V
      2. 5.12.2 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 1.5 V
      3. 5.12.3 Typical Propagation Delay (A-to-B) vs Load Capacitance, TA = 25°C, VCCA = 1.8 V
      4. 5.12.4 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 2.5 V
      5. 5.12.5 Typical Propagation Delay (A to B) vs Load Capacitance, TA = 25°C, VCCA = 3.3 V
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VCC Isolation
      2. 7.3.2 2-Rail Design
      3. 7.3.3 IO Ports are 4.6-V Tolerant
      4. 7.3.4 Partial-Power-Down Mode
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Enable Times
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • DDF|8
  • YZP|8
  • DCT|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Switching Characteristics: VCCA = 2.5 V ±0.2 V

over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 6-1)
PARAMETERFROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.2 VVCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
UNIT
TYPMINMAXMINMAXMINMAXMINMAX
tPLH (2)AB2.60.44.90.240.230.22.6ns
tPHL (2)2.60.44.90.240.230.22.6
tPLH (2)BA2.10.63.80.53.40.430.32.8ns
tPHL (2)2.10.63.80.53.40.430.32.8
tPHZ (2)DIRA2.40.77.90.86.40.850.54.3ns
tPLZ (2)2.40.77.90.86.40.850.54.3
tPHZ (2)DIRB3.814.30.64.30.54.21.14.1ns
tPLZ (2)3.814.30.64.30.54.21.14.1
tPZH (2) (1)DIRA5.98.57.77.26.9ns
tPZL (2) (1)5.98.57.77.26.9
tPZH (2) (1)DIRB512.810.486.9ns
tPZL (2) (1)512.810.486.9
The enable time is a calculated value, derived using the formula shown in the Section 8.2.2.2.1 section.
tPLH: Low-to-high Propagation Delay; tPHL: High-to-Low Propagation Delay; tPHZ: High-to-Hi-Z Propagation Delay; tPLZ: Low-to-Hi-Z Propagation Delay; tPZH: Hi-Z-to-High Propagation Delay; tPZL: Hi-Z-to-Low Propagation Delay