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SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs
SCES553H
May 2004 – November 2020
SN74AVC32T245
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SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs
1
Features
2
Applications
3
Description
4
Revison History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Thermal Information
7.4
Recommended Operating Conditions
7.5
Electrical Characteristics
7.6
Switching Characteristics: VCCA = 1.2 V
7.7
Switching Characteristics: VCCA = 1.5 V ± 0.1 V
7.8
Switching Characteristics: VCCA = 1.8 V ± 0.15 V
7.9
Switching Characteristics: VCCA = 2.5 V ± 0.2 V
7.10
Switching Characteristics: VCCA = 3.3 V ± 0.3 V
7.11
Operating Characteristics
7.12
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
9.3.2
Partial-Power-Down Mode Operation
9.3.3
VCC Isolation
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
EnableTimes
10.3
Typical Application
10.3.1
Design Requirements
10.3.2
Detailed Design Procedure
10.3.2.1
Input Voltage Ranges
10.3.2.2
Output Voltage Range
10.3.3
Application Curve
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
NMJ|96
MPBGAR5
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sces553h_oa
sces553h_pm
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DATA SHEET
SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs
1
Features
Member of the Texas Instruments
Widebus+™
Family
Control Inputs V
IH
/V
IL
Levels Referenced to V
CCA
Voltage
V
CC
Isolation Feature – If Either V
CC
Input is at GND, Both Ports are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply Range
I
off
Supports Partial-Power-Down Mode Operation
4.6 V Tolerant I/Os
Max Data Rates
380 Mbps (1.8 V to 3.3 V Level-Shifting)
200 Mbps (< 1.8 V to 3.3 V Level-Shifting)
200 Mbps (Translate to 2.5 V or 1.8 V)
150 Mbps (Translate to 1.5 V)
100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
4000 V Human-Body Model (A114-A)
1000 V Charged-Device Model (C101)
2
Applications
Personal Electronics
Industrial
Enterprise
Telecom