SCES598F July   2004  – April 2024 SN74AVCH1T45

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCCA= 1.2V
    7. 6.7  Switching Characteristics, VCCA= 1.5V ± 0.1V
    8. 6.8  Switching Characteristics, VCCA= 1.8V ± 0.15V
    9. 6.9  Switching Characteristics, VCCA= 2.5V ± 0.2V
    10. 6.10 Switching Characteristics, VCCA= 3.3V ± 0.3V
    11. 6.11 Operating Characteristics
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fully Configurable Dual-Rail Design
      2. 8.3.2 Supports High-Speed Translation
      3. 8.3.3 Partial-Power-Down Mode Operation
      4. 8.3.4 Active Bus-Hold Circuitry
      5. 8.3.5 VCC Isolation
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Unidirectional Logic Level-Shifting Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Bidirectional Logic Level-Shifting Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Enable Times
        3. 9.2.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2 Bidirectional Logic Level-Shifting Application

Figure 9-3 shows the SN74AVCH1T45 being used in a bidirectional logic level-shifting application. Take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions because the SN74AVCH1T45 does not have an output-enable (OE) pin.

GUID-BF5EB4FE-F85F-4A4D-956B-93AB8D6DC98C-low.gifFigure 9-3 Bidirectional Logic Level-Shifting Application Diagram

The following table shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1.

Table 9-3 Data Transmission: SYSTEM-1 and SYSTEM-2
STATEDIR CTRLI/O-1I/O-2DESCRIPTION
1HOutInSYSTEM-1 data to SYSTEM-2
2HHi-ZHi-ZSYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled.
3LHi-ZHi-ZDIR bit is flipped. I/O-1 and I/O-2 still are disabled.
4LInOutSYSTEM-2 data to SYSTEM-1