SCDS141D October   2003  – September 2021 SN74CB3Q3305

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions (1)
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • PW|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1 Design Requirements

  1. Recommended Input Conditions:
    • For specified high and low levels, see VIH and VIL in Section 6.3.
    • Inputs and outputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.
  2. Absolute Maximum Conditions:
    • I/O currents should not exceed ±64 mA per channel.
    • Continuos current through GND or VCC should not exceed ±100 mA.
  3. Frequency Selection Criterion:
    • Maximum frequency tested is 500 MHz.
    • Added trace resistance/capacitance can reduce maximum frequency capability; use layout practices as directed in Section 11.