SCDS019M May   1995  – December 2015 SN74CBT3251

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristic
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
  • DBQ|16
  • RGY|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VCC –0.5 7 V
Input voltage, VI(2) –0.5 7 V
Continuous channel current 128 mA
Input clamp current, IK (VI/O < 0) –50 mA
Maximum junction temperature, TJ 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage 4 5.5 V
VIH High-level control input voltage 2 V
VIL Low-level control input voltage 0.8 V
TA Operating free-air temperature –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) SN74CBT3251 UNIT
D
(SOIC)		 DB
(SSOP)		 DBQ
(SSOP)		 PW
(TSSOP)		 RGY
(VQFN)
16 PINS 16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 73(2) 82(2) 90(2) 108(2) 39(3) °C/W
RθJC(top) Junction-to-case (top) thermal resistance 70.6 49.0 59.0 41.6 52.8 °C/W
RθJB Junction-to-board thermal resistance 77.8 49.4 50.1 51.9 20.4 °C/W
ψJT Junction-to-top characterization parameter 24.3 10.5 13.9 4.0 1.1 °C/W
ψJB Junction-to-board characterization parameter 77.4 48.8 49.7 51.3 20.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — — — 6.4 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
(3) The package thermal impedance is calculated in accordance with JESD 51-5.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK VCC = 4.5 V, II = −18 mA –1.2 V
II VCC = 5.5 V, VI = 5.5 V or GND ±1 µA
ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
ΔICC(2) Control inputs VCC = 5.5 V; One input at 3.4 V, other inputs at VCC or GND 2.5 mA
Ci Control inputs VI = 3 V or 0 3.5 pF
Cio(OFF) A port VO = 3 V or 0, OE = VCC 17.5 pF
B port VO = 3 V or 0, OE = VCC 4
ron(3) VCC = 4 V, TYP at VCC = 4 V, VI = 2.4 V, II = 15 mA 14 20 Ω
VCC = 4.5 V VI = 0 II = 64 mA 5 7
II = 30 mA 5 7
VI = 2.4 V, II = 15 mA 10 15
(1) All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
(2) This is the increase in supply current for each input at the specified TTL voltage level, rather than VCC or GND.
(3) Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.

6.6 Switching Characteristics

over operating free-air temperature free-air temperature range, CL = 50 pF (unless otherwise noted)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC MIN MAX UNIT
tpd(1) A or B B or A VCC = 4 V 0.35 ns
VCC = 5 V ±0.5 V 0.24
tpd S A VCC = 4 V 6 ns
VCC = 5 V ±0.5 V 2 5.5
ten S B VCC = 4 V 6.4 ns
VCC = 5 V ±0.5 V 1.5 5.6
OE A or B VCC = 4 V 6.4
VCC = 5 V ±0.5 V 1.6 5.8
tdis S B VCC = 4 V 6.8 ns
VCC = 5 V ±0.5 V 1.9 6.4
OE A or B VCC = 4 V 6
VCC = 5 V ±0.5 V 2.3 6.2
(1) The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).

6.7 Typical Characteristic

SN74CBT3251 D001_SCDS001.gif Figure 1. ICC Variation With Temperature