SCDS047H March   1998  – December 2018 SN74CBTLV3383

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic, Each FET Switch
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|24
  • DBQ|24
  • DW|24
  • PW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

SN74CBTLV3383 Load_current_scds047.gifFigure 1. Load Current
SN74CBTLV3383 volt_wave_pulse_duration_scds047.gifFigure 2. Voltage Waveforms Pulse Duration
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SN74CBTLV3383 volt_wave_setup_hold_scds047.gifFigure 3. Voltage Waveforms Setup and Hold Times
SN74CBTLV3383 volt_wave_prop_delay_scds047.gifFigure 4. Voltage Waveforms Propagation Delay Times Inverting and Noninverting Outputs
SN74CBTLV3383 volt_wave_enable_disable_scds047.gifFigure 5. Voltage Waveforms Enable And Disable Times Low- and High-Level Enabling

Notes:

  1. CL includes probe and jig capacitance.
  2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control
  3. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
  4. The outputs are measured one at a time with one transition per measurement.
  5. tPLZ and tPHZ are the same as tdis.
  6. tPZL and tPZH are the same as ten.
  7. tPLH and tPHL are the same as tpd.
  8. H. All parameters and waveforms are not applicable to all devices.