SCDS192C April   2005  – September 2021 SN74CBTU4411

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristic
  7. 7 Parameter Measurement Information
    1. 7.1 Enable and Disable Times
    2. 7.2 Skew and Propagation Delay Times
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
  13. 13Electrostatic Discharge Caution
  14. 14Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 ZST Package
72-Pin NFBGA
Top View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
0D0 A4 I/O D0 port0
0D1 B7 I/O D1 port0
0D2 A10 I/O D2 port0
0D3 C10 I/O D3 port0
0D4 F11 I/O D4 port0
0D5 J11 I/O D5 port0
0D6 K9 I/O D6 port0
0D7 K6 I/O D7 port0
0D8 K4 I/O D8 port0
0D9 K1 I/O D9 port0
0D10 G1 I/O D10 port0
1D0 A5 I/O D0 port1
1D1 A7 I/O D1 port1
1D2 A11 I/O D2 port1
1D3 D11 I/O D3 port1
1D4 G11 I/O D4 port1
1D5 J10 I/O D5 port1
1D6 L9 I/O D6 port1
1D7 L6 I/O D7 port1
1D8 L3 I/O D8 port1
1D9 J1 I/O D9 port1
1D10 F1 I/O D10 port1
2D0 A6 I/O D0 port2
2D1 A8 I/O D1 port2
2D2 B11 I/O D2 port2
2D3 E10 I/O D3 port2
2D4 H10 I/O D4 port2
2D5 K11 I/O D5 port2
2D6 L8 I/O D6 port2
2D7 L5 I/O D7 port2
2D8 L2 I/O D8 port2
2D9 H2 I/O D9 port2
2D10 E1 I/O D10 port2
3D0 B6 I/O D0 port3
3D1 A9 I/O D1 port3
3D2 C11 I/O D2 port3
3D3 E11 I/O D3 port3
3D4 H11 I/O D4 port3
3D5 L11 I/O D5 port3
3D6 L7 I/O D6 port3
3D7 L4 I/O D7 port3
3D8 L1 I/O D8 port3
3D9 H1 I/O D9 port3
3D10 E2 I/O D10 port3
DQS_EN A2 I D10 port output voltage control
ENn C2 I Active low enable input
GND B4, B9, F10,
K7, K2, G2, D2		 P Ground
H0 B5 I/O H port0
H1 B8 I/O H port1
H2 B10 I/O H port2
H3 D10 I/O H port3
H4 G10 I/O H port4
H5 K10 I/O H port5
H6 K8 I/O H port6
H7 K5 I/O H port7
H8 K3 I/O H port8
H9 J2 I/O H port9
H10 F2 I/O H port10
S0 B2 I Select input control
S1 A1 I Select input control
TC B1 I Termination control input
VBIAS D1 P Bias voltage
VDD A3, B3, L10 P Power supply
VREF C1 P Reference voltage
(1) I = input, O = output, I/O = input and output, P = power