SCLS305E January   1996  – May 2022 SN54HC541 , SN74HC541

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, TA = 25°C
    6. 6.6  Electrical Characteristics, SN54HC541
    7. 6.7  Electrical Characteristics, SN74HC541
    8. 6.8  Switching Characteristics, CL = 50 pF, TA = 25°C
    9. 6.9  Switching Characteristics, CL = 50 pF, SN54HC541
    10. 6.10 Switching Characteristics, CL = 50 pF, SN74HC541
    11. 6.11 Switching Characteristics, CL = 150 pF, TA = 25°C
    12. 6.12 Switching Characteristics, CL = 150 pF, SN54HC541
    13. 6.13 Switching Characteristics, CL = 150 pF, SN74HC541
    14. 6.14 Operating Characteristics
    15. 6.15 Typical Characteristics
  7. 7 Parameter Measurement Information
    1.     24
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • NS|20
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

These octal buffers and line drivers feature the performance of the SNx4HC541 devices and a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.

The 3-state outputs are controlled by a two-input NOR gate. If either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state. The SNx4HC541 devices provide true data at the outputs.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
SN74HC541DWSOIC (20)12.80 mm × 7.50 mm
SN74HC541DBSSOP (20)7.20 mm × 5.30 mm
SN74HC541NPDIP (20)24.33 mm × 6.35 mm
SN74HC541NSSO (20)12.60 mm × 5.30 mm
SN74HC541PWTSSOP (20)6.50 mm × 4.40 mm
SN54HC541JCDIP (20)24.20 mm × 6.92 mm
SN54HC541FKLCCC (20)8.89 mm × 8.89 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-29DB49C7-B3C4-4EF6-8F58-FC82FB115CDB-low.gif Functional Block Diagram