SCLS147G December   1982  – April 2022 SN54HC573A , SN74HC573A

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
    1.     17
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The SNx4HC573A devices are octal transparent
D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the
Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.

Device Information(1)
PART NUMBERPACKAGEBODY SIZE (NOM)
SN54HC573AJCDIP (20)26.92 mm × 6.92 mm
SN54HC573AWCFP (20)13.72 mm × 6.92 mm
SN54HC573AFKLCCC (20)8.89 mm × 8.89 mm
SN74HC573ANPDIP (20)25.40 mm × 6.35 mm
SN74HC573ADWSOIC (20)12.80 mm × 7.50 mm
SN74HC573ADBSSOP (20)7.20 mm × 5.30 mm
SN74HC573APWTSSOP (20)5.00 mm × 4.40 mm
For all available packages, see the orderable addendum at the end of the data sheet.
GUID-7A9FDC71-3BB6-4129-9680-8D94BED963A7-low.gifLogic Diagram (Positive Logic)