SCLS826D August   2020  – December 2021 SN74HCS165-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     4
    2.     5
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diode Structure
      4. 8.3.4 Latching Logic
      5. 8.3.5 Wettable Flanks
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) SN74HCS165-Q1 UNIT
PW (TSSOP) D (SOIC) BQB (WQFN) DYY (SOT) WBQB (WQFN)
16 PINS 16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 141.2 122.2 108.4 186.2 97.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 78.8 80.9 77.3 109.1 93.8 °C/W
RθJB Junction-to-board thermal resistance 85.8 80.6 74.4 111.0 66.4 °C/W
ΨJT Junction-to-top characterization parameter 27.7 40.4 12.6 18.0 14.6 °C/W
ΨJB Junction-to-board characterization parameter 85.5 80.3 74.5 110.9 66.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 54.3 N/A 44.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.