SCLS871B July   2021  – August 2024 SN74HCS240

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5.   5
  6.   6
  7. Pin Configuration and Functions
  8. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
    8. 5.8 Typical Characteristics
  9. Parameter Measurement Information
  10. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Feature Description
        1. 7.3.1.1 Balanced CMOS 3-State Outputs
        2. 7.3.1.2 Balanced CMOS Push-Pull Outputs
        3. 7.3.1.3 Open-Drain CMOS Outputs
        4. 7.3.1.4 CMOS Schmitt-Trigger Inputs
        5. 7.3.1.5 TTL-Compatible CMOS Inputs
        6. 7.3.1.6 Standard CMOS Inputs
        7. 7.3.1.7 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  11. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  12. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  13. 10Revision History
  14. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

SN74HCS240 DGS Package, 20-Pin VSSOP (Top View)Figure 4-1 DGS Package, 20-Pin VSSOP (Top View)
SN74HCS240 RKS Package, 20-Pin VQFN
            (Top View)Figure 4-2 RKS Package,
20-Pin VQFN
(Top View)
Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
1OE 1 I Bank 1, output enable, active low
1A1 2 I Bank 1, channel 1 input
2Y4 3 O Bank 2, channel 4 output
1A2 4 I Bank 1, channel 2 input
2Y3 5 O Bank 2, channel 3 output
1A3 6 I Bank 1, channel 3 input
2Y2 7 O Bank 2, channel 2 output
1A4 8 I Bank 1, channel 4 input
2Y1 9 O Bank 2, channel 1 output
GND 10 Ground
2A1 11 I Bank 2, channel 1 input
1Y4 12 O Bank 1, channel 4 output
2A2 13 I Bank 2, channel 2 input
1Y3 14 O Bank 1, channel 3 output
2A3 15 I Bank 2, channel 3 input
1Y2 16 O Bank 1, channel 2 output
2A4 17 I Bank 2, channel 4 input
1Y1 18 O Bank 1, channel 1 output
2OE 19 I Bank 2, output enable, active low
VCC 20 Positive supply
Thermal Pad The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply
I = input, O = output, P = power, FB = feedback, GND = ground, N/A = not applicable