SCLS854A
November 2021 – February 2022
SN74HCS373-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Characteristics
6.7
Switching Characteristics
6.8
Operating Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS 3-State Outputs
8.3.2
CMOS Schmitt-Trigger Inputs
8.3.3
Clamp Diode Structure
8.3.4
Wettable Flanks
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|20
MPDS362A
RKS|20
MPQF266C
Thermal pad, mechanical data (Package|Pins)
RKS|20
QFND670A
Orderable Information
scls854a_oa
scls854a_pm
9.2.3
Application Curve
Figure 9-2
Example Timing Diagram for One Channel