SCLS860A November   2021  – February 2022 SN74HCS574-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     4
    2.     5
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diode Structure
      4. 8.3.4 Wettable Flanks
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20211117-SS0I-M8DV-DQK8-MDWZKT39WWMW-low.gifPW Package
20-Pin TSSOP
Top View
GUID-20210920-SS0I-ZLPQ-DP0Z-ST7MMLCVQ6N7-low.gifWRKS package
20-Pin VQFN
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
OE 1 Input Output enable for all channels, active low
1D 2 Input Input for channel 1
2D 3 Input Input for channel 2
3D 4 Input Input for channel 3
4D 5 Input Input for channel 4
5D 6 Input Input for channel 5
6D 7 Input Input for channel 6
7D 8 Input Input for channel 7
8D 9 Input Input for channel 8
GND 10 — Ground
CLK 11 Input Clock input for all channels, rising edge triggered
8Q 12 Output Output for channel 8
7Q 13 Output Output for channel 7
6Q 14 Output Output for channel 6
5Q 15 Output Output for channel 5
4Q 16 Output Output for channel 4
3Q 17 Output Output for channel 3
2Q 18 Output Output for channel 2
1Q 19 Output Output for channel 1
VCC 20 — Postive supply
Thermal Pad(1) — The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
(1) WRKS package only.