SCLS762A
August 2019 – September 2019
SN74HCS7266-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Benefits of Schmitt-trigger Inputs
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS Push-Pull Outputs
8.3.2
CMOS Schmitt-Trigger Inputs
8.3.3
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Related Links
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|14
MPDS360A
D|14
MPDS177H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scls762a_oa
scls762a_pm
9.2.1
Design Requirements
All signals in the system operate at 5 V
The XNOR outputs LOW if any of these conditions apply:
Input clock is in a HIGH state while the reference clock is in a LOW state
Input clock is in a LOW state while the reference clock is in a HIGH state