SCLS171F March 1984 – March 2022 SN54HCT138 , SN74HCT138
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The ’HCT138 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
PART NUMBER | PACKAGE(1) | BODY SIZE (NOM) |
---|---|---|
SN74HCT138D | SOIC (16) | 9.90 mm × 3.90 mm |
SN74HCT138N | PDIP (16) | 19.31 mm × 6.35 mm |
SN74HCT138NS | SO (16) | 6.20 mm × 5.30 mm |
SN74HCT138PW | TSSOP (16) | 5.00 mm × 4.40 mm |
SN54HCT138J | CDIP (16) | 24.38 mm × 6.92 mm |
SNJ54HCT138FK | LCCC (20) | 8.89 mm × 8.45 mm |