SCLS225G JULY 1995 – November 2016 SN54HCT14 , SN74HCT14
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The SN74HCT14 device is a Schmitt-Trigger input CMOS device that can be used for a multitude of inverting buffer type functions. The application shown here takes advantage of the Schmitt-Trigger inputs to produce a delay for a logic input.
This device uses CMOS technology. Take care to avoid bus contention, because it can drive currents that would exceed maximum limits. Parallel output drive can create fast edges into light loads, so consider routing and load conditions to prevent ringing.
This circuit is designed around an RC network that produces a slow input to the second inverter. The RC time constant, τ, is calculated from: τ = RC.
The delay time for this circuit is from tdelay(min) = –ln |1 – VT+(min) / VCC| τ to tdelay(max) = –ln |1 – VT+(max) / VCC| τ. It must be noted that the delay is consistent for each device, but because the switching threshold is only ensured between the minimum and maximum value, the output pulse length varies between devices. These values must be calculated by using the minimum and maximum ensured VT+ values in the Electrical Characteristics.
The resistor value must be chosen such that the maximum current to and from the SN74HCT14 is 8 mA at
5-V VCC.