SCLS176G July   2003  – July 2022 SN74HCT573

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions (1)
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Timing Requirements
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • NS|20
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The ’HCT573 devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
SN74HCT573DWSOIC (20)12.80 mm × 7.50 mm
SN74HCT573DBSSOP (20)7.20 mm × 5.30 mm
SN74HCT573NPDIP (20)25.40 mm × 6.35 mm
SN74HCT573NSSO (20)15.00 mm × 5.30 mm
SN74HCT573PWTSSOP (20)6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-16184A9F-7006-4E09-A337-62A1B61CE856-low.png Functional Block Diagram