SDLS146B October   1976  – September 2016 SN54LS245 , SN74LS245

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 3-State outputs
      2. 9.3.2 PNP Inputs
      3. 9.3.3 Hysteresis on Bus Inputs
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resource
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • NS|20
  • N|20
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

J, W, DB, DW, N, or NS Package
20-Pin CDIP, CFP, SSOP, SOIC, PDIP, or SO
Top View
SN54LS245 SN74LS245 po1_dls146.gif
FK Package
20-Pin LCCC
Top View
SN54LS245 SN74LS245 po2_dls146.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 DIR I Controls signal direction; Low = Bx to Ax, High = Ax to Bx
2 A1 I/O Channel 1, A side
3 A2 I/O Channel 2, A side
4 A3 I/O Channel 3, A side
5 A4 I/O Channel 4, A side
6 A5 I/O Channel 5, A side
7 A6 I/O Channel 6, A side
8 A7 I/O Channel 7, A side
9 A8 I/O Channel 8, A side
10 GND — Ground
11 B8 O/I Channel 8, B side
12 B7 O/I Channel 7, B side
13 B6 O/I Channel 6, B side
14 B5 O/I Channel 5, B side
15 B4 O/I Channel 4, B side
16 B3 O/I Channel 3, B side
17 B2 O/I Channel 2, B side
18 B1 O/I Channel 1, B side
19 OE I Active low output enable; Low = all channels active, High = all channels disabled (high impedance)
20 VCC — Power supply