SCLS885
December 2022
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions (1)
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics - VCC = 2.5 V ± 0.25 V
6.7
Switching Characteristics - VCC = 3.3 V ± 0.3 V
6.8
Switching Characteristics - VCC = 5 V ± 0.5 V
6.9
Operating Characteristics
6.10
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Standard CMOS Inputs
8.3.2
Balanced CMOS Push-Pull Outputs
8.3.3
Partial Power Down (Ioff)
8.3.4
Wettable Flanks
8.3.5
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Power Considerations
9.2.2
Input Considerations
9.2.3
Output Considerations
9.2.4
Detailed Design Procedure
9.2.5
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
BQB|16
MPQF539A
Thermal pad, mechanical data (Package|Pins)
BQB|16
PPTD365
Orderable Information
scls885_oa
scls885_pm
11.2
Layout Example
Figure 11-1
Layout Example for the
SN74LV138A-Q1