SCLS456D February   2001  – March 2023 SN74LV166A

PRODMIX  

  1. 1 Features
  2. 2 Application
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCC = 2.5 V ± 0.2 V
    7. 6.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 6.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 6.9  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics, VCC = 5 V ± 0.5 V
    12.     Timing Diagram
    13. 6.12 Operating Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Power Supply Recommendations
    2. 9.2 Layout
      1. 9.2.1 Layout Guidelines
        1. 9.2.1.1 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4.     Trademarks
    5. 10.4 Electrostatic Discharge Caution
    6. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
  • NS|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-D2813AA4-AC17-4CEB-8596-819EDF1C451E-low.pngD, DB, DGV, NS, or PW Package
16-Pin SOP, SOIC, SSOP, TSSOP, TVSOP
(Top View)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
SER 1 I Serial Output
A 2 I Parallel Input
B 3 I Parallel Input
C 4 I Parallel Input
D 5 I Parallel Input
CLK 7 I Clock input
GND 8 __ Ground
CLR 9 I Clear input, active low
E 10 I Parallel Input
F 11 I Parallel Input
G 12 I Parallel Input
QH 13 O QH output
H 14 I Parallel input H
SH/ LD 15 I Shift/ load input, enable shifting when input is high, load data when input is low
VCC 16 __ Power Pin