SCLS401I April   1998  – March 2023 SN74LV174A

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCC = 2.5 V ± 0.2 V
    7. 6.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 6.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 6.9  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics, VCC = 5 V ± 0.5 V
    12. 6.12 Noise Characteristics
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 Latching Logic
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • NS|16
  • D|16
  • DGV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage 2 5.5 V
VIH High-level input voltage VCC = 2 V 1.5 V
VCC = 2.3 V to 2.7 V VCC × 0.7
VCC = 3 V to 3.6 V VCC × 0.7
VCC = 4.5 V to 5.5 V VCC × 0.7
VIL Low-level input voltage VCC = 2 V 0.5 V
VCC = 2.3 V to 2.7 V VCC × 0.3
VCC = 3 V to 3.6 V VCC × 0.3
VCC = 4.5 V to 5.5 V VCC × 0.3
VI Input voltage 0 5.5 V
VO Output voltage High or low state 0 VCC V
IOH High-level output current VCC = 2 V –50 µA
VCC = 2.3 V to 2.7 V –2 mA
VCC = 3 V to 3.6 V –6
VCC = 4.5 V to 5.5 V –12
IOL Low-level output current VCC = 2 V 50 µA
VCC = 2.3 V to 2.7 V 2 mA
VCC = 3 V to 3.6 V 6
VCC = 4.5 V to 5.5 V 12
Δt/Δv Input transition rise or fall rate VCC = 2.3 V to 2.7 V 200 ns/V
VCC = 3 V to 3.6 V 100
VCC = 4.5 V to 5.5 V 20
TA Operating free-air temperature –40 85 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.