SCLS944A
July 2023 – January 2024
SN74LV1T02-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics: 1.8-V VCC
5.7
Switching Characteristics: 2.5-V VCC
5.8
Switching Characteristics: 3.3-V VCC
5.9
Switching Characteristics: 5.0-V VCC
5.10
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Balanced CMOS Push-Pull Outputs
7.3.2
LVxT Enhanced Input Voltage
7.3.2.1
Down Translation
7.3.2.2
Up Translation
7.3.3
Clamp Diode Structure
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Power Considerations
8.2.1.2
Input Considerations
8.2.1.3
Output Considerations
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|5
MPDS025J
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scls944a_oa
scls944a_pm
4
Pin Configuration and Functions
Figure 4-1
SN74LV1T02-Q1 DBV Package, 5-Pin SOT-23; DCK Package, 5-Pin SC-70 (Top View)
Table 4-1 Pin Functions
PIN
TYPE
(1)
DESCRIPTION
NAME
NO.
A
1
I
Input A
B
2
I
Input B
GND
3
G
Ground
Y
4
O
Output Y
V
CC
5
P
Positive Supply
(1)
I = input, O = output, I/O = input or output, G = ground, P = power.