SCLS740D November   2013  – August 2024 SN74LV1T02

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Clamp Diode Structure
      2. 8.3.2 Balanced CMOS Push-Pull Outputs
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Power Supply Recommendations
    2. 9.2 Layout
      1. 9.2.1 Layout Guidelines
      2. 9.2.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Switching Characteristics

over recommended operating free-air temperature range (unless otherwise noted) (see Parameter Measurement Information)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 FREQUENCY
(TYP)		 VCC CL TA = 25°C TA = –65°C to 125°C UNIT
MIN TYP MAX MIN TYP MAX
tpd Any In Y DC to 50 MHz 5.0 V 15 pF 4 5 4 5 ns
30 pF 5.5 7.0 5.5 7.0
3.3 V 15 pF 4.8 5 5 5.5 ns
30 pF 5 5.5 5.5 6.5
DC to 25 MHz 2.5 V 15 pF 6 6.5 7 7.5 ns
30 pF 6.5 7.5 7.5 8.5
DC to 15 MHz 1.8 V 15 pF 10.5 11 11 12 ns
30 pF 12 13 12 14