SCLS925B May 2023 – April 2024 SN74LV1T04-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The SN74LV1T04-Q1 contains a single inverter gate with integrated voltage level translation. Each gate performs the Boolean function Y = A in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).
PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) | BODY SIZE (NOM)(3) |
---|---|---|---|
SN74LV1T04-Q1 | DCK (SC70, 5) | 2 mm × 2.1 mm | 2 mm × 1.25 mm |
DBV (SOT-23, 5) | 2.9 mm × 2.8 mm | 2.9 mm × 1.6 mm |