SCLS383R september   1997  – august 2023 SN74LV244A

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Noise Characteristics
    7. 6.7  Operating Characteristics
    8. 6.8  Switching Characteristics: VCC = 2.5 V ± 0.2 V
    9. 6.9  Switching Characteristics: VCC = 3.3 V ± 0.3 V
    10. 6.10 Switching Characteristics: VCC = 5 V ± 0.5 V
    11. 6.11 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Power Considerations
      2. 9.2.2 Input Considerations
      3. 9.2.3 Output Considerations
      4. 9.2.4 Detailed Design Procedure
      5. 9.2.5 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-C4E0BC55-AD9F-4605-B00F-28ABCFCECF0A-low.gifFigure 5-1 DB, DGV, DW, NS, PW, or DGS Package, 20-Pin SSOP, TVSOP, SOIC, SO, TSSOP, or VSSOP (Top View)
GUID-8909D4A9-61F0-4145-A147-4931F83E606C-low.gifFigure 5-2 RGY and RKS Package, 20-Pin VQFN With Exposed Thermal Pad (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
1A1 2 I Input
1A2 4 I Input
1A3 6 I Input
1A4 8 I Input
1 OE 1 I Output enable
1Y1 18 O Output
1Y2 16 O Output
1Y3 14 O Output
1Y4 12 O Output
2A1 11 I Input
2A2 13 I Input
2A3 15 I Input
2A4 17 I Input
2 OE 19 I Output enable
2Y1 9 O Output
2Y2 7 O Output
2Y3 5 O Output
2Y4 3 O Output
GND 10 — Ground
VCC 20 — Power pin

Thermal pad(2)

—

The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
(1) Signal Types: I = Input, O = Output, I/O = Input or Output
(2) RKS package only