SCLS980
November 2023
SN74LV3T97-EP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Noise Characteristics
5.8
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
CMOS Schmitt-Trigger Inputs
7.3.2
Balanced CMOS Push-Pull Outputs
7.3.3
Clamp Diode Structure
7.3.4
SCxT Enhanced Input Voltage
7.3.4.1
Down Translation
7.3.4.2
Up Translation
7.4
Device Functional Modes
7.4.1
Logic Configurations
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Power Considerations
8.2.1.2
Input Considerations
8.2.1.3
Output Considerations
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|14
MPDS360A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scls980_oa
scls980_pm
9.1.1
Related Documentation
For related documentation, see the following:
Texas Instruments,
Implications of Slow or Floating CMOS Inputs
application report