Refer to the PDF data sheet for device specific package drawings
These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 1.65V to 5.5V VCC operation.
The SNx4LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5V (peak) to be transmitted in either direction.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) |
---|---|---|
SNx4LV4053A | D (SOIC, 16) | 9.9mm × 6mm |
PW (TSSOP, 16) | 5mm × 6.4mm | |
RGY (VQFN, 16) | 4mm × 3.5mm | |
DYY (SOT-23-THIN, 16) | 4.2mm x 3.26mm |
PIN | TYPE(2) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
2Y1 | 1 | I(1) | Input to mux 2 |
2Y0 | 2 | I(1) | Input to mux 2 |
3Y1 | 3 | I(1) | Input to mux 3 |
3-COM | 4 | O(1) | Output of mux 3 |
3Y0 | 5 | I(1) | Input to mux 3 |
INH | 6 | I | Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off. |
GND | 7 | - | Ground |
GND | 8 | - | Ground |
C | 9 | I | Selector line for outputs (see Section 7.2 for specific information) |
B | 10 | I | Selector line for outputs (see Section 7.2 for specific information) |
A | 11 | I | Selector line for outputs (see Section 7.2 for specific information) |
1Y0 | 12 | I(1) | Input to mux 1 |
1Y1 | 13 | I(1) | Input to mux 1 |
1-COM | 14 | O(1) | Output of mux 1 |
2-COM | 15 | O(1) | Output of mux 2 |
VCC | 16 | I | Device power input |