SCLS919
april 2023
SN74LV4T00-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics 1.8-V VCC
6.7
Switching Characteristics 2.5-V VCC
6.8
Switching Characteristics 3.3-V VCC
6.9
Switching Characteristics 5.0-V VCC
6.10
Noise Characteristics
7
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Balanced CMOS 3-State Outputs
9.3.2
Clamp Diode Structure
9.3.3
LVxT Enhanced Input Voltage
9.3.3.1
Down Translation
9.3.3.2
Up Translation
9.3.4
Wettable Flanks
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.1.1
Power Considerations
10.2.1.2
Input Considerations
10.2.1.3
Output Considerations
10.2.2
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Receiving Notification of Documentation Updates
13.3
Support Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|14
MPDS360A
BQA|14
MPQF538A
Thermal pad, mechanical data (Package|Pins)
BQA|14
QFND687
Orderable Information
scls919_oa
scls919_pm
13.1
Documentation Support