SCLS914 may   2023 SN74LV4T32-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics 1.8-V VCC
    7. 6.7  Switching Characteristics 2.5-V VCC
    8. 6.8  Switching Characteristics 3.3-V VCC
    9. 6.9  Switching Characteristics 5.0-V VCC
    10. 6.10 Noise Characteristics
    11. 6.11 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Clamp Diode Structure
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
      4. 8.3.4 Wettable Flanks
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage 1.6 5.5 V
VI Input voltage 0 5.5 V
VO Output voltage 0 VCC V
VIH High-level input voltage VCC = 1.65 V to 2 V 1.1 V
VCC = 2.25 V to 2.75 V 1.28
VCC = 3 V to 3.6 V 1.45
VCC = 4.5 V to 5.5 V 2
VIL Low-Level input voltage VCC = 1.65 V to 2 V 0.5 V
VCC = 2.25 V to 2.75 V 0.65
VCC = 3 V to 3.6 V 0.75
VCC = 4.5 V to 5.5 V 0.85
IO Output current VCC = 1.6 V to 2 V ±3 mA
VCC = 2.25 V to 2.75 V ±7
VCC = 3.3 V to 5.0 V ±15
Δt/Δv Input transition rise or fall rate VCC = 1.6 V to 5.0 V 20 ns/V
TA Operating free-air temperature -40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report: Implications of Slow or Floating CMOS Inputs.