SCLS410N
april 1998 – august 2023
SN74LV541A
PRODMIX
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics, VCC = 2.5 V ± 0.2 V
6.7
Switching Characteristics, VCC = 3.3 V ± 0.3 V
6.8
Switching Characteristics, VCC = 5 V ± 0.5 V
6.9
Noise Characteristics
6.10
Operating Characteristics
6.11
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS 3-State Outputs
8.3.2
Partial Power Down (Ioff)
8.3.3
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Power Considerations
9.2.2
Input Considerations
9.2.3
Output Considerations
9.2.4
Detailed Design Procedure
9.2.5
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Glossary
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DW|20
MPDS173B
DB|20
MPDS508B
DGS|20
MPSS137
PW|20
MPDS362A
RKS|20
MPQF266C
RGY|20
MPQF116H
NS|20
MSOP002A
Thermal pad, mechanical data (Package|Pins)
RKS|20
QFND312B
RGY|20
QFND041R
Orderable Information
scls410n_oa
scls410n_pm
6.10
Operating Characteristics
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
CC
TYP
UNIT
C
pd
Power dissipation capacitance
Outputs enabled
C
L
= 50 pF,
f = 10 MHz
3.3 V
16.3
pF
5 V
17.8