The SN74LV595A device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
SN74LV595A | RGY (VQFN, 16) | 4.00 mm × 3.50 mm |
PW (TSSOP, 16) | 5.00 mm × 4.40 mm | |
NS (SO, 16) | 10.20 mm × 5.30 mm | |
D (SOIC, 16) | 9.00 mm × 3.90 mm | |
BQB (WQFN, 16) | 3.60 mm × 2.60 mm |
Changes from Revision S (November 2022) to Revision T (March 2023)
Changes from Revision R (June 2022) to Revision S (November 2022)
Changes from Revision Q (April 2016) to Revision R (June 2022)
Changes from Revision P (October 2014) to Revision Q (April 2016)
Changes from Revision O (January 2011) to Revision P (October 2014)
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
GND | 8 | G | Ground Pin | |
OE | 13 | I |
Output Enable Pin. Active LOW |
|
QA | 15 | O | QA Output | |
QB | 1 | O | QB Output | |
QC | 2 | O | QC Output | |
QD | 3 | O | QD Output | |
QE | 4 | O | QE Output | |
QF | 5 | O | QF Output | |
QG | 6 | O | QG Output | |
QH | 7 | O | QH Output | |
QH' | 9 | O | QH' Output | |
RCLK | 12 | I | RCLK Input | |
SER | 14 | I | SER Input | |
SRCLK | 11 | I | SRCLK Input | |
SRCLR | 10 | I | SRCLR Input | |
VCC | 16 | P | Power Pin | |
Thermal Pad | — | Thermal Pad(2) |