Refer to the PDF data sheet for device specific package drawings
The SN74LV6T07-EP device contains six independent buffers with open-drain outputs. Each buffer performs the Boolean function Y = A in positive logic.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).
PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) | BODY SIZE (NOM)(3) |
---|---|---|---|
SN74LV6T07-EP | PW (TSSOP, 14) | 5 mm × 6.4 mm | 5 mm × 4.4 mm |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
1A | 1 | I | Channel 1, Input A |
1Y | 2 | O | Channel 1, Output Y |
2A | 3 | I | Channel 2, Input A |
2Y | 4 | O | Channel 2, Output Y |
3A | 5 | I | Channel 3, Input A |
3Y | 6 | O | Channel 3, Output Y |
GND | 7 | G | Ground |
4Y | 8 | O | Channel 4, Output Y |
4A | 9 | I | Channel 4, Input A |
5Y | 10 | O | Channel 5, Output Y |
5A | 11 | I | Channel 5, Input A |
6Y | 12 | O | Channel 6, Output Y |
6A | 13 | I | Channel 6, Input A |
VCC | 14 | P | Positive Supply |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage range | –0.5 | 7 | V | |
VI | Input voltage range(2) | –0.5 | 7 | V | |
VO | Voltage range applied to any output in the high-impedance or power-off state(2) | –0.5 | 7 | V | |
VO | Output voltage range(2) | –0.5 | VCC + 0.5 | V | |
IIK | Input clamp current | VI < -0.5V | -20 | mA | |
IOK | Output clamp current | VO < -0.5V or VO > VCC + 0.5V | ±20 | mA | |
IO | Continuous output current | VO = 0 to VCC | ±25 | mA | |
Continuous output current through VCC or GND | ±50 | mA | |||
Tstg | Storage temperature | -65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) | ±1000 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage | 1.6 | 5.5 | V | |
VI | Input voltage | 0 | 5.5 | V | |
VO | Output voltage | 0 | VCC | V | |
VIH | High-level input voltage | VCC = 1.65V to 2V | 1.1 | V | |
VCC = 2.25V to 2.75V | 1.28 | ||||
VCC = 3V to 3.6V | 1.45 | ||||
VCC = 4.5V to 5.5V | 2 | ||||
VIL | Low-Level input voltage | VCC = 1.65V to 2V | 0.5 | V | |
VCC = 2.25V to 2.75V | 0.65 | ||||
VCC = 3V to 3.6V | 0.75 | ||||
VCC = 4.5V to 5.5V | 0.85 | ||||
IO | Output current | VCC = 1.6V to 2V | ±3 | mA | |
VCC = 2.25V to 2.75V | ±7 | ||||
VCC = 3.3V to 5.0V | ±15 | ||||
Δt/Δv | Input transition rise or fall rate | VCC = 1.6V to 5.0V | 20 | ns/V | |
TA | Operating free-air temperature | -55 | 125 | °C |