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  • SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

    • SCLS556C december   2003  – august 2023 SN74LV74A-Q1

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  • SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop
  1.   1
  2. 1Features
  3. 2Description
  4. 3Revision History
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements, VCC = 2.5 V ±0.2 V
    7. 5.7  Timing Requirements, VCC = 3.3 V ±0.3 V
    8. 5.8  Timing Requirements, VCC = 5 V ±0.5 V
    9. 5.9  Switching Characteristics, VCC = 2.5 V ±0.2 V
    10. 5.10 Switching Characteristics, VCC = 3.3 V ±0.3 V
    11. 5.11 Switching Characteristics, VCC = 5 V ±0.5 V
    12. 5.12 Noise Characteristics
    13. 5.13 Operating Characteristics
  7. 6Parameter Measurement Information
  8. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Mechanical, Packaging, and Orderable Information
  11. IMPORTANT NOTICE

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • scls556c_oa
  • scls556c_pm
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Data Sheet

SN74LV74A-Q1 Automotive Dual Positive-Edge-Triggered D-Type Flip-Flop

1 Features

  • Qualified for automotive applications
  • Operation of 2-V to 5.5-V VCC
  • Max tpd of 13 ns at 5 V
  • Typical VOLP (output ground bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
  • Support mixed-mode voltage operation on all ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

 
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