SCLS589B August   2004  – May 2020 SN74LV8154

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. Table 1. Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements
    7. 6.7  Switching Characteristics - VCC = 3.3 V ± 0.3 V
    8. 6.8  Switching Characteristics VCC = 5 V ± 0.5 V
    9. 6.9  Noise Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2 Detailed Design Procedure

  • Connect Y0 through Y7 to the data bus.
  • Connect A, B, and C to lower address bus lines.
  • Connect G2A, G2B, and G1 to decoded addresses to provide 8 or more unique memory locations.
  • Connect two pulse sources to CLKA and CLKB inputs. If sources have noise or slow edges then pass the signal through a Schmitt trigger buffer first.
  • If only one counter is needed, connect the single pulse source to both CLKA and CLKB.
  • Also connect CLKBEN to RCOA instead of ground.

Table 3. Function Table

INPUTS(1) OUTPUT(1) RESULT
G1 G2A G2B C B A Yn
L X X X X X Z No action
X H X X X X Z No action
X X H X X X Z No action
H L L L L L A lower byte Read lower byte of counter A storage register
H L L L L H A upper byte Read upper byte of counter A storage register
H L L L H L B lower byte Read lower byte of counter B storage register
H L L L H H B upper byte Read upper byte of counter B storage register
H L L H L L Z Save counters into storage register
after changing any input
H L L H L H Z Reset both counters to zero
H L L H H L Z No action
H L L H H H Z No action
(1) L = low, H = high, X = don't care, Z = high Impedance.