SCAS988 March 2024 SN74LV8T244-Q1
ADVANCE INFORMATION
Refer to the PDF data sheet for device specific package drawings
The SN74LV8T244-Q1 contains 8 individual high speed CMOS buffers with 3-state outputs.
Each buffer performs the boolean logic function xYn = xAn, with x being the bank number and n being the channel number.
Each output enable (xOE) controls four buffers. When the xOE pin is in the low state, the outputs of all buffers in the bank x are enabled. When the xOE pin is in the high state, the outputs of all buffers in the bank x are disabled. All disabled output are placed into the high-impedance state.
To put the device in the high-impedance state during power up or power down, tie both OE pins to VCC through a pull-up resistor; the current sinking capability of the driver determines the minimum value of the resistor, and the leakage of the pin as defined in the Electrical Characteristics table.