SCLS902 February   2024 SN74LV8T594

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     13
    8. 5.7 Switching Characteristics
    9. 5.8 Noise Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. Feature Description
    1. 8.1 Balanced CMOS Push-Pull Outputs
    2. 8.2 Latching Logic with Known Power-Up State
    3. 8.3 LVxT Enhanced Input Voltage
    4. 8.4 Clamp Diode Structure
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-0BF64138-AA99-4467-86A9-548B304BB95C-low.gifFigure 4-1 PW Package, 16-Pin TSSOP (Top View)
GUID-20200820-CA0I-LVGW-LJH3-D3KLRXHXFLJQ-low.gifFigure 4-2 BQB Package, 16-Pin WQFN (Transparent Top View)
Table 4-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMENO.
QB1OQB output
QC2OQC output
QD3OQD output
QE4OQE output
QF5OQF output
QG6OQG output
QH7OQH output
GND8GGround
QH'9OSerial output, can be used for cascading
SRCLR10IShift register clear, active low
SRCLK11IShift register clock, rising edge triggered
RCLK12IOutput register clock, rising edge triggered
RCLR13IStorage register clear, active low
SER14ISerial input
QA15OQA output
VCC16PPositive supply
I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power