SCAS995 March 2024 SN74LV8T595-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
This device includes latching logic circuitry. Latching circuits commonly include D-type latches and D-type flip-flops, but include all logic circuits that act as volatile memory. In typical logic devices, the output state of each latching circuit is unknown after power is initially applied; however, this device includes an added Power On Reset (POR) circuit which sets the states of all included latching circuits during the power-up ramp prior to the device starting normal functionality.
Figure 7-2 shows a correct supply voltage turn-on ramp and defines values used in the Recommended Operating Conditions and Electrical Characteristics tables.
Prior to starting the power-on ramp, the supply must be completely off (VCC ≤ VPOR(min)).
The supply voltage must ramp at a rate within the range provided in the Recommended Operating Conditions table.
The output state of each latching logic circuit only remains stable as long as power is applied to the device (VCC ≥ VPOR(max)).
Variation from these recommendations will result in the device having an unknown power-up state.