Loading [MathJax]/jax/output/SVG/fonts/TeX/fontdata.js
Data Sheet
SN74LV8T595
8-Bit Shift Register with Tri-State
Outputs and Logic-Level Shifter
1 Features
- Latching logic with known power-up state
provides consistent start-up behavior
- Wide operating range of 1.65V to
5.5V
- 5.5V tolerant input pins
- Single-supply voltage
translator (refer to LVxT Enhanced Input Voltage):
- Up translation:
- 1.2V to 1.8V
- 1.5V to 2.5V
- 1.8V to 3.3V
- 3.3V to 5.0V
Down translation:
- 5.0V, 3.3V, 2.5V
to 1.8V
- 5.0V, 3.3V to
2.5V
- 5.0V to 3.3V
- Up to 150Mbps
with 5V or 3.3V VCC
- Supports standard function
pinout
- Latch-up performance exceeds
250mA
per JESD 17