SCAS290T January   2015  – September 2024 SN74LVC125A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
      3. 8.1.3 Application Curves
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • RGY|14
  • DB|14
  • PW|14
  • BQA|14
  • NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

This quadruple bus buffer gate is designed for 1.65V to 3.6V VCC operation.

The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74LVC125A BQA (WQFN, 14) 3mm × 2.5mm 3mm × 2.5mm
D (SOIC, 14) 8.6 mm × 6mm 8.65mm × 3.91mm
DB (SSOP, 14) 6.20mm × 7.8mm 6.20mm × 5.30mm
NS (SOP, 14) 10.2mm × 7.8mm 10.30mm × 5.30mm
PW (TSSOP, 14) 5.00mm × 6.4mm 5.00mm × 4.40mm
RGY (VQFN, 14) 3.50mm × 3.50mm 3.50mm × 3.50mm
(1) For more information, see Section 11.
(2) The package size (length x width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
SN74LVC125A Simplified Schematic Simplified Schematic