SCAS755B December   2003  – June 2014 SN74LVC16373A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Operating Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGG|48
  • DL|48
  • DGV|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Member of the Texas Instruments
    Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.2 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live-Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • Servers
  • PCs and Notebooks
  • Network Switches
  • Wearable Health and Fitness Devices
  • Telecom Infrastructures
  • Electronic Points of Sale

3 Description

The SN74LVC16373A device is a 16-bit transparent D-type latch which is designed for 1.65-V to 3.6-V VCC operation.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVC16373A TSSOP (48) 12.50 mm × 6.10 mm
TVSOP (48) 9.70 mm × 4.40 mm
SSOP (48) 15.80 mm × 7.49 mm
BGA MICROSTAR JUNIOR (56) 7.00 mm × 4.50 mm
BGA MICROSTAR JUNIOR (54) 8.00 mm × 5.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

ld_cas755.gif