SCLSA17 May   2024 SN74LVC165A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     13
    8. 5.7 Switching Characteristics
    9. 5.8 Noise Characteristics
    10. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Latching Logic
      4. 7.3.4 Partial Power Down (Ioff)
      5. 7.3.5 Standard CMOS Inputs
      6. 7.3.6 Wettable Flanks
      7. 7.3.7 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • BQB|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

SN74LVC165A-Q1 BQB
                            Package,16-Pin WQFN(Top
                        View)Figure 4-1 BQB Package,16-Pin WQFN(Top View)
SN74LVC165A-Q1 DYY or PW
                            Package,16-Pin VSSOP or
                            TSSOP(Top View)Figure 4-2 DYY or PW Package,16-Pin VSSOP or TSSOP(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
SH/LD 1 I Enable shifting when input is high, load data when input is low
CLK 2 I Clock, rising edge triggered
E 3 I Parallel input E
F 4 I Parallel input F
G 5 I Parallel input G
H 6 I Parallel input H
QH 7 O Inverted serial output
GND 8 G Ground
QH 9 O Serial output
SER 10 I Serial input
A 11 I Parallel input A
B 12 I Parallel input B
C 13 I Parallel input C
D 14 I Parallel input D
CLK INH 15 I Clock inhibit input
VCC 16 P Positive supply
Thermal Pad(2) The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
Signal Types: I = Input, O = Output, I/O = Input or Output, P = Power, G = Ground.
Only applies to the BQB package