SCLSA15 May   2024 SN74LVC166A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7.     13
    8. 5.7 Switching Characteristics
    9. 5.8 Noise Characteristics
    10. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Latching Logic
      3. 7.3.3 Partial Power Down (Ioff)
      4. 7.3.4 Standard CMOS Inputs
      5. 7.3.5 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

SN74LVC166A BQB Package,16-Pin WQFN(Top View)Figure 4-1 BQB Package,16-Pin WQFN(Top View)
SN74LVC166A D or PW Package,16-Pin SOIC or TSSOP(Top View)Figure 4-2 D or PW Package,16-Pin SOIC or TSSOP(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
SER 1 I Serial data input
A 2 I Parallel input A
B 3 I Parallel input B
C 4 I Parallel input C
D 5 I Parallel input D
CLK INH 6 I Clock inhibit input
CLK 7 I Clock input
GND 8 G Ground
CLR 9 I Clock for Channel 2, rising edge triggered
E 10 O Parallel input E
F 11 I Parallel input F
G 12 I Parallel input G
QH 13 I Serial output
H 14 I Parallel input H
SH/LD 15 I Enable shifting when input is high, enable loading data when input is low
VCC 16 P Positive supply
Thermal Pad(2) — The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.
(2) BQB package only