SCES467D July   2003  – August 2020 SN74LVC1G126-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 Partial Power Down (Ioff)
      3. 8.3.3 Standard CMOS Inputs
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
  • DRY|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
VCCSupply voltageOperating1.655.5V
Data retention only1.5
VIHHigh-level input voltageVCC = 1.65 V to 1.95 V0.65 × VCCV
VCC = 2.3 V to 2.7 V1.7
VCC = 3 V to 3.6 V2
VCC = 4.5 V to 5.5 V0.7 × VCC
VILLow-level input voltageVCC = 1.65 V to 1.95 V0.35 × VCCV
VCC = 2.3 V to 2.7 V0.7
VCC = 3 V to 3.6 V0.8
VCC = 4.5 V to 5.5 V0.3 × VCC
VIInput voltage05.5V
VOOutput voltage0VCCV
IOHHigh-level output currentVCC = 1.65 V–4mA
VCC = 2.3 V–8
VCC = 3 V–16
–24
VCC = 4.5 V–24
IOLLow-level output currentVCC = 1.65 V4mA
VCC = 2.3 V8
VCC = 3 V16
24
VCC = 4.5 V24
Δt/ΔvInput transition rise or fall rateVCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V20ns/V
VCC = 3.3 V ± 0.3 V10
VCC = 5 V ± 0.5 V5
TAOperating free-air temperature–40125°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.