SCES224R April 1999 – January 2015 SN74LVC1G126
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The SN74LVC1G126 device contains a dual buffer gate with output enable control and performs the Boolean function Y = A.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
INPUTS | OUTPUT Y |
|
---|---|---|
OE | A | |
H | H | H |
H | L | L |
L | X | Z |