Refer to the PDF data sheet for device specific package drawings
The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCC operation and performs the Boolean function Y = A × B or Y = A + B in positive logic.
Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.
This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
ORDER NUMBER | PACKAGE | BODY SIZE |
---|---|---|
SN74LVC1G132DBV | SOT-23 (5) | 2.90 mm × 1.60 mm |
SN74LVC1G132DCK | SC70 (5) | 2.00 mm × 1.25 mm |
Changes from C Revision (December 2013) to D Revision
Changes from B Revision (September 2006) to C Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | DBV, DCK | ||
A | 1 | I | A logic input |
B | 2 | I | B logic input |
GND | 3 | — | Ground |
VCC | 5 | — | Positive supply |
Y | 4 | O | Y NAND logic output |