SCES538G January   2004  – February 2020 SN74LVC1G38

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Logic Diagram (Positive Logic)
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, CL = 15 pF
    7. 6.7  Switching Characteristics, CL = 30 pF or 50 pF, –40°C to +85°C
    8. 6.8  Switching Characteristics, CL = 30 pF or 50 pF, –40°C to +125°C
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
    1.     (Open Drain)
    2.     (Open Drain)
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High-Drive Open-Drain Output
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Clamp Diodes
      4. 8.3.4 Partial Power Down (Ioff)
      5. 8.3.5 Over-Voltage Tolerant Inputs
      6. 8.3.6 Up Translation and Down Translation Capable Outputs
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DPW|5
  • DBV|5
  • DSF|6
  • DCK|5
  • DRY|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from F Revision (October) to G Revision

  • Changed the TA high-end temp from +1255°C to +125°C in the Test Conditions field of the Electrical Characteristics table. Go

Changes from E Revision (August 2017) to F Revision

  • Added values for DPW (X2SON) package in Thermal Information table. Go

Changes from D Revision (December 2013) to E Revision

  • Added DPW (X2SON) packageGo
  • Added Applications, Device Information table, Pin Configuration and Functions section, ESD Ratings table, Thermal Information table, Typical Characteristics, Detailed Description section, Application and Implementation section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Added Maximum junction temperature, TJGo
  • Changed values in the Thermal Information table to align with JEDEC standardsGo

Changes from C Revision (March 2011) to D Revision

  • Updated document to new TI data sheet format.Go
  • Updated Ioff in Features.Go
  • Added ESD warning.Go
  • Updated operating temperature range.Go