SCES581D JULY   2004  – October 2015 SN74LVC1GX04

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, SN74LVC1GX04
    7. 6.7  Switching Characteristics, SN74LVC1GX04
    8. 6.8  Switching Characteristics, SN74LVC1GX04
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|6
  • DRL|6
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The SN74LVC1GX04 is optimized for creating a crystal oscillator circuit with a buffered square-wave output. This device is fully specified for partial-power-down applications using Ioff (Y output only). The Ioff circuitry disables the outputs, preventing damaging current back-flow through the device when it is powered down.

8.2 Functional Block Diagram

SN74LVC1GX04 logic_sgds029.gif Figure 4. Logic Diagram (Positive Logic)

8.3 Feature Description

The first inverter is used as a linear amplifier for crystal oscillator.

The last three inverters ensure a fast edge square-wave at the Y output.

8.4 Device Functional Modes

The only intended device use is to generate a square-wave output using a crystal to set the operating frequency.

Table 1. Function Table

INPUT X1 OUTPUTS
X2 Y
H L H
L H L