SCES677F September   2006  – June 2024 SN74LVC1T45-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.8V ±0.15V
    7. 5.7  Switching Characteristics: VCCA = 2.5V ±0.2V
    8. 5.8  Switching Characteristics: VCCA = 3.3V ±0.3V
    9. 5.9  Switching Characteristics: VCCA = 5V ±0.5V
    10. 5.10 Typical Characteristics
  7.   Parameter Measurement Information
  8. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Glitch-Free Power Supply Sequencing
    4. 6.4 Device Functional Modes
  9.   Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Enable Times
    2. 7.2 Typical Applications
      1. 7.2.1 Unidirectional Logic Level-Shifting Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Bidirectional Logic Level-Shifting Application
        1. 7.2.2.1 Detailed Design Procedure
        2. 7.2.2.2 Application Curves
    3.     35
    4. 7.3 Power Supply Recommendations
    5. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  11. 8Revision History
  12. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3 Power Supply Recommendations

Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing without any supply sequencing requirements such as ramp order or ramp rate.

This device was designed with various power supply sequencing methods in mind to help prevent unintended triggering of downstream devices, as described in Glitch-free Power Supply Sequencing.